| PART |
Description |
Maker |
| 74VHC74MTC 74VHC74N 74VHC74SJ 74VHC74 74VHC74MTCX |
Dual D-Type Flip-Flop 双D型触发器
Supervisor Push-Pull Active High, -40C to 85C, 3-SOT-23, T/R
Dual D-Type Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
|
| 74VHCT74A 74VHCT74AM 74VHCT74ASJ 74VHCT74 74VHCT74 |
Octal D-type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D-Type Flip-Flop with Preset and Clear AHCT/VHCT/VT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| 74AUP2G79GF 74AUP2G79GS |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| HEC4027BT-T HEC4027BT112 HEC4027BT118 |
Dual JK flip-flop 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Dual JK flip-flop; Package: SOT109-1 (SO16); Container: Tube 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Dual JK flip-flop; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13"
|
NXP Semiconductors N.V.
|
| MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
| KIC7W74FK |
D Flip Flop
SILICON MONOLITHIC CMOS DIGITAL INTEGRATED CIRCUIT(D-TYPE FLIP FLOP WITH PRESET AND CLEAR)
|
Korea Electronics (KEC)
KEC[KEC(Korea Electronics)]
|
| 74LVTH374 74LVT374 74LVT374WMX 74LVTH374WMX 74LVTH |
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
From old datasheet system
Octal D-Type Flip-Flop 八路D类触发器
|
Fairchild Semiconductor, Corp.
|
